Sunday, 30 August 2009

Lo-Res Graphics!



The machine has been running reliably for some time now - running a "Dewdney's game of life" program continuously for 5 days at 5Mhz - it should be good for six but I haven't got a crystal handy!

Anyway now its going reliably I decided to add a PIO chip which was very easy - those lads at Zilog made some very nice and easy chips! But then I needed something for the PIO to do so I decided to build something to interface with one of my other hobbies - NBTV (narrow bandwidth television).

I've already built a televisor (a mechanical television) and concocted my own colour standard so why not build a "graphics card" that can output NBTV signals! So far the graphics card comprises ten resistors and a transistor to combine 7 bits output by the PIO into a single analogue voltage (2 bits for R, G and B and another bit for sync).

An interrupt routine runs off the CTC which outputs a pixel every 50uS. This works ok but jumps about a fair bit if there are any other interrupts for the serial port or the other CTC timers.

A program can run (slowly) in the foreground and update the contents of the screen. The resolution is 48x32 pixels with 64 grey tones.

Next up I'm going to add colour and make a proper graphics card that generates NMIs instead of interrupts so that the other interrupts don't mess with the timing!

Tuesday, 11 August 2009

Improved memory logic


After a bit of a redesign I've now got both CMOS and NMOS working at 4MHz reliably. It turns out that the memory board logic had too long a propagation to the ROM and RAM0 lines - caused by having two cascade '138s and lots of '02s and '04s in the way.


After a bit of head scratching I've now got the control logic down to the attached diagram and this seems to be a lot more reliable at speed and leaves a nice WINDOW signal which will be used as the window for the graphics memory when I get round to trying out the VGA card.


Dom

Saturday, 8 August 2009

Working again

I've now got everything working at 4MHz with either the NMOS or CMOS part. This after much messing around!

I've now got a "proper" clock module giving 8MHz as the main clock and drive all the other chips from the XTAL/2 line (to get proper 50/50 duty cycle). Also the clock is now buffered seperately before going to the bus.

I still am getting the odd glitches though that disturb interrupt operation but I'm not sure why!

Anyway I've now added a CTC chip and am exercising this with some code. More schematics and code to follow soon....

Monday, 3 August 2009

Once step forwards...one step back



The step forward:

I've now got IM2 mode interrupts working - and a decent improvement in throughput!

The mistake I'd made was in the buffering of the Z80, not the software. When an IM0 or IM2 interrupt happens the z80 asserts /IORQ and /M1 together and the device puts the vector on the bus which the z80 reads, however the z80 doesn't assert /RD so my old buffering logic was not letting it through! I've now changed the buffers to work on /WR and WR instead of /WR and /RD. (new bits in blue boxes on the schema).

The step back:

I bought a CMOS z80 (8MHz) from ebay in the hope of improving on my clock speed but this hasn't worked out, the new part is only capable of 2MHz! No idea why yet though I think I'll try adding some pull-ups to the data lines between the buffers and the z80....can't hurt can it?

Dom